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Electrical & Computer Engineering
Jongeun Lee

Assistant professor / UNIST

INTRO

Embedded systems, Compiler optimization, Microprocessor architecture, Application-specific instruction set processor (ASIP), Reconfigurable computing, Multi-core processor programming, Reliability

profile

이름 : 이종은
소속 : 전기전자컴퓨터공학부
직위 :조교수

전화번호 : +82-52-217-2116
이메일 : jlee@unist.ac.kr
홈페이지 : http://ecl.unist.ac.kr

– B.Sc.: Seoul National University, Electical Engineering (February 1997)
– M.Sc.: Seoul National University, Electrical Engineering (February 1999)
– Ph.D.: Seoul National University, Electrical Engineering and Computer Science (February 2004)
– Visiting Scholar at University of California, Irvine from 2002 to 2003
– Postdoctoral Research Associate at Arizona State University from 2007 to 2009

research

research–
Embedded systems, Compiler optimization, Microprocessor architecture, Application-specific instruction set processor (ASIP), Reconfigurable computing, Multi-core processor programming, Reliability

publications

Selected Journal Publications

J. Lee, A. Shrivastava, “A compiler-microarchitecture hybrid approach to soft error reduction for register files,” to appear in IEEE Trans. Computer-Aided Design of Circuits and Systems. [SCI-expanded]

A. Shrivastava, J. Lee, R. Jeyapaul, “Cache vulnerability equations for protecting data in caches from soft errors,” ACM SIGPLAN Notices, 2010. (Corresponding Author) [SCI-expanded]

Y. Kim, J. Lee, Y. Paek, A. Shrivastava, “Operation and data mapping for CGRAs with multi-bank memory,” ACM SIGPLAN Notices, 2010. (Corresponding Author) [SCI-expanded]

J. Lee, A. Shrivastava, “A compiler optimization to reduce soft errors in register files,” ACM SIGPLAN Notices, 44(7):41-49, 2009. [SCI-expanded]

J. Lee, K. Choi, N. Dutt, “Instruction set synthesis with efficient instruction encoding for configurable processors,” ACM Trans. Design Automation of Electronic Systems, 12(1), 2007. [SCI-expanded]

Book Chapter

Jongeun Lee, Kiyoung Choi and Nikil Dutt, “Synthesis of Instruction Sets for High-Performance and Energy-Efficient ASIP,” in Designing Embedded Processors: A Low Power Perspective, Jörg Henkel and Sri Parameswaran (Editors), Springer, 2007 (ISBN: 978-1-4020-5868-4).

Patents

Korea Patent Pending, 2006-02-28, “Apparatus and method for transaction ID width conversion”

Korea Patent 10-0722770-0000, 2007-05-22, “Coarse-Grained Reconfigurable Architecture for Supporting Conditional Execution

Korea Patent 10-0368546-0000, 2003-01-06, “Method for Hardware-software Coverification by Optimistic Execution of Real Processor”

education

Jongeun Lee

+82-52-217-2116